Below are listed the open positions within the UCLouvain RF SOI Group. We are always seeking bright curious minds to join our team, on research involving integrated CMOS technologies for RF and mm-wave applications, from device and substrate material characterization and engineering to front-end circuit designs, and more, under the supervisions of profs. Jean-Pierre Raskin and/or Dimitri Lederer. Spontaneous applications for research topics in this field other than those open positions listed below can be made, please make use of our contact form.

(1) Open Positions in UCLouvain

The Louvain School of Engineering of Université catholique de Louvain (UCLouvain) is seeking for three RF Device Engineering PhD students (4 years) and one post-doc (3 years) to work on advanced techniques for on-wafer characterization and modelling of Silicon-on-Insulator (SOI) devices in wide frequency and temperature ranges.

Louvain School of Engineering has been pioneering and promoting the use of RF-SOI for high frequency applications for over 30 years, and has accumulated decades of experience in the field. We are now recruiting highly motivated and interested candidates to help us with our investigation towards next generation FD-SOI CMOS transistors below 22 nm to tackle applications in the RF and mm-wave domains such as telecommunications, radars, imaging, sensing, etc. Those scientific investigations will be conducted in the framework of several European Chips JU projects (SOIL, ArCTIC, FAMES, Move2THz). The candidates will collaborate with the best universities, research centers (imec (Be), CEA-Leti (Fr), etc.) and companies (STMicroelectronics (Fr), GlobalFoundries (De), SOITEC (Fr), etc.).

Key responsibilities include:

  • On-wafer characterization of SOI substrates and MOSFET devices over a wide frequency band (from dc up to 325 GHz) in a large temperature range from cryogenic (4 K) to high-temperatures (250°C); extraction of small-signal equivalent circuits and main Figures of Merit (FoM);
  • In-depth characterization and physical understanding of non-stationary/transient phenomena in advanced SOI-based MOSFET devices, such as self-heating, electro-thermal coupling, substrate network response, trapping, noise;
  • TCAD simulations (using commercial software: Synopsis, Silvaco, …) of SOI substrates and MOSFET devices;
  • Modelling of SOI-based substrates;
  • Modelling of advanced FD-SOI transistors down to 10 nm, including (i) self-heating phenomena and (ii) substrate and back-gate network;
  • Reliability and harsh environment (temperature, radiation) study of the advanced FD-SOI MOSFETs;
  • Collaboration with device and reliability engineers and researchers working at Incize (Be), SOITEC (Fr), CEA-Leti (Fr), ST-Microelectronics (Fr), GlobalFoundries (De), etc.
  • Dissemination of the scientific results via international conferences and writing of scientific articles.

Position Requirements

  • Master in Physics or Electrical Engineering with semiconductor device analysis experience is a must;
  • Experience in using TCAD simulation software is a plus;
  • Familiarity with vector-network analyzer microwave analysis is a plus;
  • Experience with on-wafer measurements is a plus;
  • Understanding of broadband high-frequency and analog device figures of merit is a must;
  • Good communication skills and ability to work across functional teams of device, electrical characterization, reliability and layout is a must;
  • Good English speaking and writing skills (at least B2) is a must.

Hosting lab information

The PhD students will be hosted by the RF-SOI Group of the Louvain School of Engineering. Under the guidance of Prof. J.-P. Raskin, the group has pioneered the widespread use of SOI for RF and microwave applications by establishing a clear path to transform lossy SOI substrates into quasi-lossless material. Thanks to those developments SOITEC’s eSI™ RF-SOI substrate has been able to displace III-V on the mobile handset RF switch market and at present almost all new smartphones have RF-SOI inside.

To apply

If you are interested in working within our group and meet the above requirements, please get in touch with us using our contact form

(2) Joint position between imec & UCLouvain

In order to enable the next generation of communication and sensing systems (5G, 6G), the circuits are getting more complex than ever and are composed today of several chips, each implemented in different technologies optimized for a specific function. Downscaling of CMOS technology has allowed the integration of high-speed transceivers on Silicon chips, but power amplifiers using III-V technologies, and high-performance switches fabricated on SOI substrates remain the preferred choice for RF Front-End circuits. In order to develop sustainable, cost and power efficient RF and millimeter-wave systems, the current research at imec for RF front-end module technologies addresses: (i) the integration of high-speed III-V (InP, GaAs) and III-N (GaN) devices on a Si platform; and (ii) the co-integration of these device architectures with standard Si CMOS. In that context, it is critical to optimize the technology considering the material properties along with the electrical and thermal aspects.  In this PhD, you will contribute to solve this challenge by studying various substrate technologies from different perspectives:

  • Assess the effect on RF figures of merit (loss, crosstalk, distortion, etc.) of the different interfaces created by advanced integration. These non-ideal interfaces are expected to present fixed charges and traps causing RF losses and non-linearities as well as frequency dependent phenomena;
  • Characterization of material properties of various engineered silicon-based substrates and thin films, for instance extraction of dielectric constant and losses from advanced on-wafer measurements in millimeter-wave domain, as well as analyze their thermal properties;
  • Simulation with TCAD tools and modelling the impact of substrates on the transistor and circuit performances;
  • Process optimization towards high performance and sustainable solutions.

Required background: Candidates are expected to have a Master’s degree in Electrical Engineering, Material Science, Nanoscience and Nanotechnology or equivalent, with a solid background in semiconductor physics and excellent quantitative/analytical skills.

Type of work: Literature study: 20%, Characterization: 40%, Modelling: 40%

Supervisor: Jean-Pierre Raskin

Co-supervisor: Bertrand Parvais

Daily advisor: Sachin Yadav

The reference code for this position is 2025-035. Mention this reference code on your application form.

Hosting lab information

The PhD will be hosted by the RF-SOI Group and delivered by the Louvain School of Engineering, under the guidance of Prof. J.-P. Raskin. The candidate will also have unique access to the technologies and facilities at imec under the supervision of Dr. Bertrand Parvais and Dr. Sachin Yadav.

To apply

If you are interested in working within our group and meet the above requirements, please get in touch with us using our contact form, and/or consult the application form on the following imec webpage.