Pieter Cardinael was born in Esch-sur-Alzette, Luxemburg, in 1996, and received his B.S. and M.S. degrees in materials science engineering from Université Catholique de Louvain in 2017 and 2019, respectively. He is currently a PhD student at the electrical engineering department at UCLouvain.
His research focuses on the integration of III-V materials on a silicon platform for next-generation RF integrated circuits applications in close collaboration with imec, Leuven, Belgium.
His work includes characterization of RF passives structures and physics-based simulation of interfaces between semiconductors for modelling and optimization of small- and large-signal performance.
Research Projects
GaN-on-Si buffer modelling
AlN/Si interfaces
C-doped GaN
GaN and CMOS cointegration
Extraction of interface traps and fixed charge
AC and quasi-static C-V characterization
On-wafer RF & mm-wave measurements
Passives (CPW lines)
Time-dependent evolution of small-signal parameters and characteristic time constants