Quentin was born in Uccle, Belgium, in 1996. He received the B.S and M.S. degrees in electrical engineering in 2018 and 2020, respectively and is now a PhD student from Université catholique de Louvain, Belgium.
His research focuses on substrate and active devices simulation, modeling and characterization for monolithic integration of RF/mmW devices in SOI technology.
It also includes design of mmW ICs to assess substrates performances.