Lecture: Benjamin Iñiguez, “Simulation and modeling of nanoscale multiple-gate SOI MOSFETs”

Benjamin Iñiguez, Pr., IEEE EDS Distinguished Lecturer, Full Professor at the Departament d’Enginyeria Electrònica, Elèctrica, i Automàtica, Universitat Rovira i Virgili, Tarragona, Spain.

Simulation and modeling of nanoscale multiple-gate SOI MOSFETs

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Seminar: David Bol, “A 25MHz 7µW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes”

David Bol, Dr., Post-doctoral researcher at Electrical Engineering Department (ELEN), Institute of Information and Communication Technologies, Electronics and Applied Mathematics (ICTEAM), Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium.

A 25MHz 7µW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

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Lecture: Fernando Silveira, “Ultra Low Power Analog Integrated Circuits for Implantable Medical Devices”

Fernando Silveira, Pr., IEEE Distinguished Lecturer, Professor at the Electrical Engineering Department of the School of Engineering, Universidad de la República, Montevideo, Uruguay.

Ultra Low Power Analog Integrated Circuits for Implantable Medical Devices

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Lecture : Yusuf Leblebici, “Subthreshold Source-Coupled Circuit Design for Ultra-Low-Power Applications”

Yusuf Leblebici, Pr., IEEE Distinguished Lecturer, Director of Microelectronic Systems Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland.

Subthreshold Source-Coupled Circuit Design for Ultra-Low-Power Applications.

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Seminar : Marcello Pavanello, “The Asymmetric Self-Cascode Structure for Improving the Analog Performance of SOI MOSFETs”

Marcello Pavanello, Prof., from University of São Paulo, Brazil. The Asymmetric Self-Cascode Structure for Improving the Analog Performance of SOI MOSFETs. In this lecture the Asymmetric Self-Cascode (ASC) Structure will be introduced and compared with the standard Self-Cascode (SC) Structure as well as with Standard SOI MOSFETs.

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