Seminar: David Bol, “A 25MHz 7µW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes”

David Bol, Dr., Post-doctoral researcher at Electrical Engineering Department (ELEN), Institute of Information and Communication Technologies, Electronics and Applied Mathematics (ICTEAM), Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium.

A 25MHz 7µW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

A 65nm 25MHz ultra-low-voltage microcontroller SoC is implemented with an embedded all-digital adaptive voltage scaling system, a glitch-masking instruction cache with no miss latency and a robust clock tree for low-voltage timing closure. It achieves 7µW/MHz power consumption in active mode, 1.5µW sleep power and 0.66mm² area to save on carbon footprint of sensor nodes.

This paper will be presented at the 2012 IEEE International Solid-State Circuits Conference (ISSCC), February 19-23, 2012, in San Francisco, CA. The UCL has not published in this n°1 conference in circuit design for 17 years!

The conference will be held on the 14th February at 14:30 in the EPL buildings (BARB 22 lecture hall, place Sainte-Barbe, Louvain-la-Neuve).