Due to the COVID-19 crisis, the information below is subject to change,
in particular that concerning the teaching mode (presential, distance or in a comodal or hybrid format).
5 credits
75.0 h
Q1 and Q2
Teacher(s)
Legat Jean-Didier; Louveaux Jérôme; Vandendorpe Luc;
Language
English
Prerequisites
Students are expected to master the following skills: design and architecture of digital electronic systems including Verilog (or VHDL) and FPGA , as they are covered within the courses LELEC2531
Content
- Simulation of a digital transmission chain
- Synchronization
- Equalization
- Multicarrier modulation
Teaching methods
Due to the COVID-19 crisis, the information in this section is particularly likely to change.
The project contains- An introductory session
- Some work sessions on Labview and in the laboratory
- Some Q&A sessions about the theoretical concepts used in the assignments
Evaluation methods
Due to the COVID-19 crisis, the information in this section is particularly likely to change.
The evaluation is based on a continuous evaluation including presentation, demonstration and reports about the various assignments
Bibliography
- Documentation LABVIEW
- Notes en anglais reprenant les défis à relever et les explications théoriques associées, sur Moodle
Faculty or entity
ELEC
