Note from June 29, 2020
Although we do not yet know how long the social distancing related to the Covid-19 pandemic will last, and regardless of the changes that had to be made in the evaluation of the June 2020 session in relation to what is provided for in this learning unit description, new learnig unit evaluation methods may still be adopted by the teachers; details of these methods have been - or will be - communicated to the students by the teachers, as soon as possible.
Although we do not yet know how long the social distancing related to the Covid-19 pandemic will last, and regardless of the changes that had to be made in the evaluation of the June 2020 session in relation to what is provided for in this learning unit description, new learnig unit evaluation methods may still be adopted by the teachers; details of these methods have been - or will be - communicated to the students by the teachers, as soon as possible.
5 credits
75.0 h
Q1 and Q2
Teacher(s)
Legat Jean-Didier; Louveaux Jérôme; Vandendorpe Luc;
Language
English
Prerequisites
Students are expected to master the following skills: design and architecture of digital electronic systems including Verilog (or VHDL) and FPGA , as they are covered within the courses LELEC2531
Evaluation methods
The evaluation is based on a continuous evaluation including presentation, demonstration and report at the end of the project
Bibliography
- Documentation LABVIEW
- Notes en anglais reprenant les défis à relever et les explications théoriques associées, sur Moodle
Faculty or entity
ELEC
