{"id":4043,"date":"2020-10-03T11:25:30","date_gmt":"2020-10-03T09:25:30","guid":{"rendered":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/?page_id=4043"},"modified":"2025-02-12T17:10:44","modified_gmt":"2025-02-12T16:10:44","slug":"dimitrilederer","status":"publish","type":"page","link":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/team\/dimitrilederer\/","title":{"rendered":"Dimitri Lederer"},"content":{"rendered":"\t\t
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Dimitri Lederer<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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<\/p>

Dimitri Lederer \u00a0received the M.S. and Ph.D. degrees in applied sciences from Universit\u00e9 catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium, in 2000 and 2006, respectively.<\/span>
<\/span><\/p>

After completing his PhD he worked in various SMEs and large-scale companies on the development of RF & microwave and mmWave products. His last role prior to joining UCLouvain was of Senior Engineer at GlobalFoundries, where he worked on the development of the 45RFSOI technology.\u00a0<\/span><\/p>

His research interests cover the modeling, fabrication and characterization of mmWave Si-based devices and circuits.\u00a0 These research activities also include the integration of<\/span>\u00a0<\/span>III-V<\/span>\u00a0and more\u00a0<\/span>exotic materials<\/span>\u00a0on Si for\u00a0<\/span>THz\u00a0<\/span>applications.\u00a0<\/span><\/p>

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Research Projects<\/strong><\/span><\/p>\n

    \n
  • mmWave IC design for sensing and communication applications<\/li>\n
  • microwave spectrometry<\/li>
  • mmWave\/sub-THz material characterization<\/li>\n
  • on-wafer mmWave\/sub-THz characterization<\/li>\n<\/ul>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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    \u00a0<\/p>

    \u00a0<\/div>
    • Development of a high Q Silicon-based waveguide platform for low loss on-chip signal propagation and high performance sub-THz circuits
      • \u00a0<\/li><\/ul><\/li><\/ul>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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        Selected publications<\/strong><\/span><\/p>

        Conference Proceedings<\/strong><\/span><\/p>

        1. M. Rack, L. Nyssens, S. Wane, S. Bajon,\u00a0D. Lederer<\/span>, J.-P. Raskin, FD-SOI mm-Wave Differential Single-Pole Switches with Ultra-High Isolation, 2021 VLSI-TSA.<\/li>
        2. S. Syed, S. Jain,\u00a0D. Lederer<\/span>, W. Liu, E. Veeramani , B. Chandhoke, A. Kumar, G. Freeman, “A highly rugged 19 dBm 28GHz PA using novel PAFET device in 45RFSOI technology achieving peak efficiency above 48%<\/span><\/em>,” 2020 IEEE\/MTT-S International Microwave Symposium (IMS), Los Angeles, CA, USA, 2020, pp. 1003-1006.<\/li>
        3. D. Lederer<\/span>, S. Jain, S. Saroop, A. Kumar and G. Freeman, “<\/span>45nm PD SOI FET gate resistance optimization for mmw applications<\/span><\/em>,” 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Burlingame, CA, USA, 2018, pp. 1-3<\/span>.<\/span><\/li>
        4. M. Rack, L. Nyssens, J. -P. Raskin, \u00a0D. Lederer<\/b>, A. Paganini, M. B. Shinde; A. Beganovic, “Device layout dimension impact on substrate effective resistivity<\/b><\/em>,” 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Burlingame, CA, USA, 2018, pp. 1-2.<\/li>
        5. T. Waliwander, M. Crowley, M. Fehilly, D. Lederer<\/strong>, J. Pike, L. Floyd and D. O’Connell., “Sub-millimeter wave 183 GHz and 366 GHz MMIC membrane sub-harmonic mixers<\/strong><\/em>“, 2011 IEEE MTT-S International Microwave Symposium, Baltimore, MD, 2011, pp. 1-4.<\/li>
        6. J. Pike, L. Floyd, D. O’Connell, T. Waliwander, M. Crowley and D. Lederer<\/strong>, “Schottky membrane technology for sub-mm wave applications<\/strong><\/em>“, The 5th European Microwave Integrated Circuits Conference, Paris, 2010, pp. 222-225.<\/li>
        7. J. Pike, L. Floyd, D. O’Connell, K. Thomas, A. Olsen, and D. Lederer<\/strong>, “Development of a Novel 380GHz Membrane Subharmonic Mixer<\/strong><\/em>“,5th ESA Workshop on Millimetre Wave Technology and Applications, ESTEC, Noordwijk, May 2009.<\/li>
        8. D. Lederer<\/strong>, Schottky technology for submillimeter-wave radiometric applications (invited paper<\/b>), “THz Radiation: Basic Research and Applications<\/strong><\/em>” 2008 Workshop, October, Alushta, Ukraine.<\/li>
        9. D. Lederer<\/strong>, C. Desrumeaux, F. Brunier and J.-P. Raskin, “High Resistivity SOI substrates: how high should we go?<\/strong><\/em>“, 2003 IEEE International SOI Conference, Newport Beach (CA), Sept. 2003, pp. 50-51.<\/li>
        10. D. Lederer<\/strong>, R. Lobet and J.-P. Raskin, “Enhanced High resistivity SOI wafers for RF applications<\/strong><\/em>“, 2004 IEEE International SOI Conference, Charleston (SC), Oct. 2004, pp. 46-47.<\/li>
        11. \u00a0\u00a0<\/span><\/strong>D. Lederer<\/strong>, V. Kilchytska, T. Rudenko N. Collaert, D. Flandre, A. Dixit, K. De Meyer and J.-P. Raskin, “FinFET analog characterization from DC to 110 GHz<\/strong><\/em>“, EUROSOI Workshop, Grenada, Spain, January 2005, pp.99-100.<\/span>

          \u00a0<\/p><\/li><\/ol>

          Journal Papers<\/strong><\/span><\/p>

          1. C. RodaNeve, V. Kilchytska, J. Alvaro, D. Lederer<\/strong>, O. Militaru, D. Flandre, J.-P. Raskin, Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer<\/strong><\/em>, Microelectronics Reliability Journal, vol.51(2), Feb. 2011, pp. 326-331.<\/span><\/li>
          2. \u00a0J.-P. Raskin, G. Pailloncy, D. Lederer<\/strong>, F. Danneville, G. Dambrine, S. Decoutere, A. Mercha and B. Parvais, High Frequency Noise Performance of 60 nm gate length FinFETs<\/strong><\/em>, IEEE Trans. Electron Dev., vol.55(10), Oct. 2008, pp.2718-2727.<\/li>
          3. D. Lederer<\/strong> <\/em>and J.-P. Raskin, RF performance of an industrial SOI technology transferred onto a passivated HR silicon substrate<\/strong><\/em>, IEEE Trans. Electron Dev., 55, vol. 7, pp. 1664-1671, July 2008.<\/span><\/li>
          4. D. Lederer<\/strong> and J.-P. Raskin, Characterization of body node in PD SOI MOSFETs using multiport VNA measurements<\/strong>,<\/em> IEEE Trans. Electron Dev., 54 (11), Nov. 2007, pp. 3030-3039.<\/span>
            <\/span><\/li>
          5. V. Kilchytska, G. Pailloncy, D. Lederer<\/strong>, J.-P. Raskin, N. Collaert, M. Jurczak, D. Flandre, Frequency variation of the small-signal output conductance of decananometer MOSFETs due to substrate crosstalk,<\/strong><\/em> IEEE Electron Dev. Lett., 28 (5), May 2007, pp. 219-221.<\/span>
            <\/span><\/span><\/li>
          6. \u00a0D. Lederer<\/strong> and J.-P. Raskin, On-wafer wideband electrical characterization: a powerful tool for improving the IC technologies,<\/strong> <\/em>(invited paper<\/strong><\/em>), Journal of Telecommunications and Information Technology, no. 2, pp. 69-77, 2007.<\/span>
            <\/span><\/span><\/span><\/li>
          7. M. Si Moussa, C. Pavageau , D. Lederer<\/strong>, L. Picheta, F. Danneville, N. Fel,\u00a0 J. Russat, J.-P. Raskin and D. Vanhoenacker-Janvier, Behaviour of TFMS and CPW Line on SOI Substrate versus High Temperature for RF Applications<\/strong><\/em>, Solid State Electronics, 50, 2006, pp. 1822-1827.\u00a0<\/span>
            <\/span><\/span><\/span><\/span><\/li>
          8. \u00a0J.-P. Raskin, T. M. Chung, V. Kilchytska, D. Lederer<\/strong> and D. Flandre, Analog\/RF Performance of Multiple-gate SOI Devices: Wideband Simulations and Characterization<\/strong><\/em>, IEEE Trans. Electron Dev., 53(5), 2006, pp. 1088-1095.<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/li>
          9. \u00a0 V. Kilchytska, <\/span>D. Lederer<\/b><\/span>, P. Simon, N. Collaert, J.-P. Raskin and D. Flandre, Accurate effective mobility extraction by split C-V technique in SOI MOSFETs<\/strong>: suppression of the influence of floating-body effects<\/strong><\/em>, IEEE Electron Dev. Lett., 26(10), 2005, pp. 749-752.\u00a0<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/span><\/li>
          10. D. Lederer<\/b><\/span>, V. Kilchytska, T. Rudenko, N. Collaert, D. Flandre, A. Dixit, K. De Meyer and J.-P. Raskin, FinFET analogue characterization from DC to 110 GHz<\/strong><\/em>, Solid State Electronics, 49(9), 2005, pp 1488-1496.<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/li>
          11. D. Lederer<\/b><\/span> and J.-P. Raskin, <\/span>New Substrate Passivation Technique Dedicated to High Resistivity SOI Wafer Fabrication<\/em>,<\/b><\/span> IEEE Electron Dev. Lett., 26(11), 2005, pp. 805-807.\u00a0<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/li>
          12. \u00a0<\/span>D. Lederer<\/b><\/span>, D. Flandre and J.-P. Raskin, Frequency degradation of SOI MOS device output conductance<\/strong><\/em>, Semiconductor and Science Technology, vol.20 (5), 2005, pp. 469-472.<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/li>
          13. \u00a0D. Lederer <\/b><\/span>and J.-P. Raskin, Effective resistivity of fully-processed SOI substrates<\/strong><\/em>, Solid State Electronics, vol 49 (3), 2005, pp. 491-496.\u00a0<\/span>
            <\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/li>
          14. D. Lederer<\/b>, D. Flandre and J.-P. Raskin, AC behavior of gate-induced floating body effects in ultra-thin oxide PD SOI MOSFETs<\/strong><\/em>, IEEE Electron Dev. Lett., Feb 2004, pp. 104-106.<\/span><\/li>
          15. D. Lederer<\/b><\/span> and J. P. Raskin, Substrate Loss Mechanisms for Microstrip and CPW Transmission Lines on Lossy Silicon Wafers<\/strong><\/em>, Solid State Electronics, vol. 47, 2003, pp. 1927-1936.<\/span>
            <\/span><\/li><\/ol>

            Book Chapters<\/strong><\/span><\/p>

            1. J.-P.\u00a0Raskin, D. Lederer<\/b>, V. Kiltchytska and D. Flandre, <\/span>Wideband Characterization\u00a0of SOI materials and devices<\/b><\/i>, in \u2018Solid State Electronics Research Trends\u2019,\u00a0Nova Publisher, 2009.<\/span><\/p><\/li>

            2. V.\u00a0Kilchytska, D. Levacq, D. Lederer<\/b>, G. Pailloncy, J.-P. Raskin and D. Flandre, \u201c<\/span>Substrate\u00a0effect on the output conductance frequency response of SOI MOSFETs<\/b><\/i>\u201d, (<\/span>invited\u00a0paper<\/b>), in \u201cNanoscaled Semiconductor-on-Insulator Structures and Devices\u201d,\u00a0S. Hall, A.N. Nazarov, V.S. Lysenko (eds), <\/span>Kluwer Academic Publishers<\/i>,\u00a0pp. 221-238, 2007, ISBN 978-1-4020-6379-4.<\/span><\/p><\/li>

            3. D. Lederer<\/b><\/span> and J.-P. Raskin,\u00a0<\/span>Temperature dependence of RF losses in HR SOI substrates<\/i>, in \u201cScience and Technology of Semiconductor-On-Insulator Structures and Devices Operating in a Harsh Environment\u201d, Flandre D., Nazarov A.N., Hemment P.L.F. (Eds), Kluwer Academic Publ. -NATO Science Series Elsevier, 2005, pp. 192-196.<\/span>
              <\/span><\/p><\/li><\/ol>

              Patents<\/strong><\/span><\/p>

              1. D.Lederer<\/b>, Bartlomiej Pawlak,<\/span>\u00a0<\/span>Charge-Trapping Layers For III-V Semiconductor Devices<\/b><\/i>, filed in April 2020, USA.\u00a0<\/span>\u00a0<\/span><\/span><\/p><\/li>

              2. D. Lederer<\/b>,\u00a0Method of manufacturing a multilayer\u00a0semiconductor structure with reduced ohmic losses<\/b><\/i>, PCT\/BE2004\/000137, filed\u00a0in October 2004, United States Patent Application: 20070032040.<\/span><\/p><\/li>

              3. \u00a0<\/span><\/span>J.-P. Raskin, D. Lederer<\/b> and F. Brunier, Process\u00a0for manufacturing a multilayer structure made from semiconducting materials<\/b><\/i>,
                filed in March 2006, United States Patent Application: US 7585748 B2<\/span><\/p><\/li><\/ol>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"

                Dimitri Lederer Dimitri Lederer \u00a0received the M.S. and Ph.D. degrees in applied sciences from Universit\u00e9 catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium, in 2000 and 2006, respectively. After completing his PhD he worked in various SMEs and large-scale companies on the development of RF & microwave and mmWave products. His last role prior to joining UCLouvain […]<\/p>\n","protected":false},"author":13,"featured_media":0,"parent":5,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_header_footer","meta":{"site-sidebar-layout":"no-sidebar","site-content-layout":"page-builder","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"disabled","ast-breadcrumbs-content":"","ast-featured-img":"disabled","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"default","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"footnotes":""},"class_list":["post-4043","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/pages\/4043","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/users\/13"}],"replies":[{"embeddable":true,"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/comments?post=4043"}],"version-history":[{"count":8,"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/pages\/4043\/revisions"}],"predecessor-version":[{"id":20283,"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/pages\/4043\/revisions\/20283"}],"up":[{"embeddable":true,"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/pages\/5"}],"wp:attachment":[{"href":"https:\/\/sites.uclouvain.be\/RF-SOI-group\/wp-json\/wp\/v2\/media?parent=4043"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}